BALTIMORE, USA: UMC, a leading global semiconductor foundry, presented at the 2009 International Electron Device Meeting (IEDM) held here, a unique 'hybrid' high-k/metal-gate (HK/MG) technology approach for 28nm.
The method combines the benefits of 'gate-first' process strength for nMOS with 'gate-last' features for pMOS to realize up to 30 percent enhanced transistor performance compared to a gate-first only process.
"The spirit of innovation is always a key factor when developing advanced technologies," said S.C. Chien, vice president of Advanced Technology Development at UMC. "This published work demonstrates UMC's ability to conceive and develop alternative solution paths, leveraging in-depth learning of existing HK/MG process options to respond to today's rising demand for cutting-edge products and applications."
There are two different HK/MG integration schemes co-existing in the industry, gate-first and gate-last. For gate-first, the HK/MG is inserted before the gate is patterned (formed). For 'gate-last' or 'replacement metal gate', MG is 'filled in' after a polysilicon dummy gate is formed and then removed.
In addition to the newly proposed hybrid approach, UMC has been developing gate-last HK/MG technology since gate-last has been proven in high volume within the industry for CPU manufacturing. The company's advanced technology development efforts are taking place at UMC's 300mm fab and R&D complex in Tainan, Taiwan.